1. Technical Field
The present invention relates to organic transistors and active-matrix substrates.
2. Related Art
Organic transistors using organic materials have recently attracted attention as an alternative to thin-film transistors using inorganic materials such as silicon. Because organic transistors can be produced by a low-temperature process, plastic substrates or films can be used to form flexible, lightweight, tough devices. In addition, organic transistors can be formed using liquid materials by a simple method such as coating or printing to form devices in a short time. This provides the great advantage of significantly reducing process costs and formation apparatus costs. Furthermore, organic transistors using organic materials can support various functions, including those that would not be feasible with inorganic materials, because the material properties of organic materials can readily be changed by, for example, modifying their molecular structures.
An organic transistor includes source and drain regions, a channel region formed of an organic semiconductor material between the source and drain regions, a gate electrode capable of applying an electric field to the channel region, and a gate insulating film between the gate electrode and the channel region. This structure allows a current to flow across the source and drain regions when an electric field is applied to the channel region.
With consideration given to processing errors such as misalignment, the gate electrode is usually formed so that it can apply an electric field over a region including at least the entire channel region and extending beyond that region. The electric field, consequently, is applied to part of or the entire source and drain regions, thus generating parasitic capacitance in the region exposed to the electric field. When the electric field applied by the gate electrode is interrupted, the parasitic capacitance is split into parasitic capacitance in the drain region and hold capacitance in an element connected to the drain region. This splitting decreases the voltage applied to the element, thus affecting the function of the element. For a display including pixel display elements connected to such drain regions, for example, its contrast decreases at pixels corresponding to pixel display elements where the voltage decrease occurs.
The magnitude of change (decrease) in the voltage applied to the elements connected to the drain regions depends on the magnitude of parasitic capacitance in the drain regions. The parasitic capacitance has variations in magnitude due to misalignment, thus causing variations in the function of the elements. Such variations in element function cause problems including degraded display performance due to variations in the degree of contrast decrease among pixels. Some methods for avoiding such problems are disclosed in, for example, JP-A-2006-278984 (Patent Document 1) and JP-T-2005-524224 (Patent Document 2). According to the method of Patent Document 1, parasitic capacitance is reduced by forming a gate insulating film that is thicker in regions other than channel regions. According to the method of Patent Document 2, periodic variations in parasitic capacitance that occur in a pixel array of a matrix display are prevented by irregularly changing the parasitic capacitance in the pixel array.
The method of Patent Document 1, however, requires a complicated process to form a gate insulating film of locally varying thickness. This may pose problems such as increased process costs and decreased yield. In addition, although this method can reduce parasitic capacitance, it cannot reduce variations in parasitic capacitance. The method of Patent Document 2, on the other hand, makes the degraded display performance of each pixel less recognizable, although this method cannot provide the effect of improving display quality because it does not improve the display performance itself.